UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 31711

10.1 ChipScope Pro, CORE Generator - Edits to "Data Port Width" are lost when "Data Same As Trigger" setting is modified

Description

When generating an ILA core using CORE Generator, if you toggle selection of the "Data Same As Trigger" option, then any previously entered value for the "Data Port Width" will be reset to the default value of 32.

Solution

This issue is resolved in ChipScope Pro and ISE 10.1 Service Pack 3.

AR# 31711
Date Created 09/19/2008
Last Updated 05/23/2014
Status Archive
Type General Article