On the Spartan-3A and Spartan-3AN devices, when using SPI mode, the external mode pins need to be used in order for the watchdog timer fallback method to work.
This Answer Record affects Spartan-3A and Spartan-3AN devices.
According to the Spartan-3 Generation Configuration User Guide, if a golden bitstream resides at 0x0 and you multiboot to a location which has an invalid bitstream, be it that the image is corrupted or even simply not there, then the FPGA will fall back to address 0x0 and reload the golden bitstream.
Indeed it will do this, but you must set one bit which is not documented in the current version of the User Guide (UG332 v1.4).
If you trigger a multiboot by specifying the New Mode bit to use the Bootmode field rather than looking at the external mode pins, the FPGA will fall back to address 0x0. However, it will not send out a read command to the flash. It will do this three times and then stop as it should.
In order to get this to work you actually have to specify the New Mode bit to use the external mode pins and thus also the external VS pins. Doing this will cause the FPGA to fall back to address 0x0 and issue a read command for the SPI Flash.
To get this to work, simply set the New Mode bit from 1 to 0.
This information will be updated in the next revision of the Spartan-3 Generation Configuration User Guide.