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AR# 32065

10.1 EDK, MPMC v4.03.a - Is mpmc_clk90 port used with SDR SDRAM PHY?


Is mpmc_clk90 port used with SDR SDRAM PHY? A 90-degree phase-shifted clock does not seem useful for a non-DDR memory interface.


mpmc_clk90 is not used by the MPMC. It can be safely driven by 'net_gnd' to prevent the error.

This issue is fixed starting in MPMC v5.00.a, to be released in EDK 11.1.

AR# 32065
Date 12/15/2012
Status Active
Type General Article
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