This Answer Record contains the Release Notes for the LogiCORE Fibre Channel v3.4 Core that was released in the for ISE 11.1, and includes the following:
- New Features
- Resolved Issues
- Known Issues
For installation instructions, general CORE Generator known issues, and design tools requirements, see the IP Release Notes Guide at:
- ISE 10.1 software support
- ISE 11.1 software support
- New Clock Domain Crossing, Ingress/Egress FIFOs at GT ports will increase latency through the core.
(Xilinx Answer 25035) For Virtex-II Pro board designs to avoid BER failures, it is important to ensure that boards meet Virtex-II Pro MGT specifications.
(Xilinx Answer 32551) LogiCORE Fibre Channel v3.4 - Demo testbench may report incorrect statistics