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  1. Xilinx - All Programmable
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  3. AR# 32702: 11.1 Timing, Virtex-6 - TRCE is incorrectly using the FastMax value for OFFSET (slowest path) clock to pad

AR# 32702

11.1 Timing, Virtex-6 - TRCE is incorrectly using the FastMax value for OFFSET (slowest path) clock to pad

Description

TRCE is incorrectly using the FastMax value for the slowest clock to out when analyzing an OFFSET constraint. It should be using the SlowMax value.

Solution

This issue is scheduled to be fixed in the next quarterly release.

AR# 32702
Date 12/15/2012
Status Active
Type General Article