When using MIG to generate an x16 DDR2 2Gb component design for Virtex-6 with a data width of 40 or 48, the tool does not select the Master Bank on the bank selection screen even when default banks are used.
Typically, MIG selects the Master Bank location with default bank configurations.
When targeting an x16 DDR2 2Gb component design with a data width of 40 or 48, the default bank selection does not include the Master Bank.
Please select the Master Bank at the top of the bank selection screen.
For information on the Master Bank selection, please see the DDR2/DDR3 Getting Started section in the Memory Interface Solutions User Guide (UG406)
This issue is resolved in MIG v3.2.