We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 32931

Virtex-6 Integrated Block Wrapper v1.2 for PCI Express - Non-default User Interface Frequency not supported when the ML605 Development Board option is selected


Known Issue: v1.2

When selecting the ML605 board option, which creates a UCF file specific for the ML605, if the user also elects to use a non-default user interface frequency, implementation will fail due to incorrect constraints in the UCF file.


This problem will be corrected in 11.3. The easiest work-around is to use the default user interface frequency when using the ML605 board.

See (Xilinx Answer 32742) for other Virtex-6 Integrated Block Wrapper v1.2 for PCI Express known issues and release notes.

Revision History

06/24/2009 - Initial Release
AR# 32931
Date 08/06/2010
Status Active
Type ??????
  • Virtex-6 FPGA Integrated Endpoint Block for PCI Express
Page Bookmarked