2. Support
  3. AR# 3296: 3.x FPGA Express - When I try to optimize, an "FE-PADMAP-3, FPGA-PAD-MAP-3" error is reported
  4. AR# 32967: 11.2, 11.1 EDK, xps_most_nic_v1_01_a - Netlist Simulation fails due to a synthesis issue for Spartan-6

AR# 32967

11.2, 11.1 EDK, xps_most_nic_v1_01_a - Netlist Simulation fails due to a synthesis issue for Spartan-6

Description

During the synthesis stage, a control signal is optimized causing the netlist simulation to fail in Spartan-6. The functional simulation works fine.

Solution

This issue is scheduled to be fixed in EDK 11.3. 

 

EDK 11.3 is available at:  

http://www.xilinx.com/xlnx/xil_sw_updates_home.jsp

AR# 32967
Date 05/23/2014
Status Archive
Type General Article