UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 32980

11.x XST - "ERROR:HDLCompiler:545 - ".vhd" Line xx: Initial value for constant declaration is not constant"

Description

The following error occurs in XST when I target Virtex-6 or Spartan-6 devices, but I do not have any issues when I target older devices. Why?

ERROR:HDLCompiler:545 - "<file>.vhd" Line xx: Initial value for constant declaration is not constant

Example code:

library ieee;

use ieee.std_logic_1164.all;

entity ex_0009 is

port(clk,a : in std_logic;

res : out std_logic

);

end ex_0009;

architecture bhv of ex_0009 is

constant my_const: std_logic:='0';

signal tmp: std_logic;

begin

tmp <= my_const;

process (clk)

constant local_const: std_logic := tmp; -- Note: Error points here

begin

if clk'event and clk='1' then

res <= a or local_const;

end if;

end process;

end;

Solution

The example above is not a VHDL LRM compliant code. To solve this issue, initialize local_const constant directly with my_const constant.

library ieee;

use ieee.std_logic_1164.all;

entity ex_0009 is

port(clk,a : in std_logic;

res : out std_logic

);

end ex_0009;

architecture bhv of ex_0009 is

constant my_const: std_logic:='0';

signal tmp: std_logic;

begin

tmp <= my_const;

process (clk)

constant local_const: std_logic := my_const; -- Note: Error points here

begin

if clk'event and clk='1' then

res <= a or local_const;

end if;

end process;

end;

In 11.2 XST introduced a new VHDL/Verilog parser for Virtex-6 and Spartan-6 families. For more information on this change please refer (Xilinx Answer 32927)

AR# 32980
Date Created 06/23/2009
Last Updated 12/15/2012
Status Active
Type General Article