AR# 33011


11 EDK - How do I configure a VxWorks image to work with a memory at a non-zero address?


Keyword: dual processor, shared memory, RTOS, interrupt, VxWorks

I am trying to create a VxWorks image for a dual PowerPC / MicroBlaze design on an ML507 based on the design provided in Xilinx Application Note 996.

If in the hardware I set the address range of the DDR2 SDRAM from 0x0 to 0x1000 0000 and configure the BSP by modifying config.h and makefile corresponding to the hardware configuration, I can run VxWorks without problem. In our other designs, the DDR memories are all set to sit at address 0x0, so they are also okay.

But with this dual processor design, we need to set the DDR2 SDRAM to start at 0x1000 0000. Following the same steps for configuring the BSP, but VxWorks doesn't work in this case. We found the problem seems to be with the interrupt handling. How do we correct this?


This is a problem with the interrupt vector table. The following information is from the VxWorks Architecture Supplement document.


The exception vector table for all PowerPC processors is located at physical

address zero. VxWorks does support a different virtual address for the vector table

on the PowerPC 440 processor.

On most PowerPC processors, except PowerPC 440 and MPC85xx, the MSRIP bit

determines where the interrupt vector table resides. The exception prefix of

0xfff00000, which corresponds to MSRIP = 1, is not supported. The MSRIP bit must

specify address 0.


So based on this description, the interrupt vector table really needs to be at address 0x0 or it needs to be resolved by enable virtual addressing.

On the other hand, there is an easier way to workaround this.

VxWorks works fine if the DDR memory is defined at address 0x0, but only for this dual processor design, the reason why the memory cannot be at address 0x0 is because MicroBlaze defines its boot vector at address 0x0. However, MPMC allows different addresses defined for different PIMs, so PowerPC and MicroBlaze can have a different address map to the external memory. This way, the DDR memory can be kept at address 0x0 for PPC and a different address be assigned for MB, so we don't need to worry about setting VxWorks up to work with a memory at a non-zero address.

AR# 33011
Date 12/15/2012
Status Active
Type General Article
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