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AR# 33214

LogiCORE IP v1.2 CIC Compiler - Why do I receive Xs out during behavioral simulation while the RDY output is low?


During a behavioral simulation of the CIC Compiler, output goes to "X" every time the RDY output is low. Why?


This is by design in the CIC Compiler v1.2. When the RDY output is low, the data output should be ignored. 


The next release of the IP core will not display Xs when RDY is low. 


This issue is resolved in 11.3 with the latest version of the CIC Compiler v1.3.

AR# 33214
Date 05/23/2014
Status Archive
Type General Article
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