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AR# 33280

11 EDK - ERROR: Exception caught when running XST synthesis!

Description

When attempting to run synthesis for my EDK design, I receive the following error messages:

Release 11.2 - generatecore $Revision: 1.23 $ (nt)

Copyright (c) 1995-2009 Xilinx, Inc. All rights reserved.

Last:0 Text:Warning: EDIF Netlist being generated

XSTHandler: XST: HDL Compilation

ERROR: Exception caught when running XST synthesis!

Exception in thread "main" java.lang.RuntimeException: XST has returned an

error: ERROR:HDLCompilers:220 - Open of library file

'../implementation/trimode_mac_gmii_wrapper_fifo_generator_v4_3_1_fifo_generator

_v4_3_xst_1_xsd/blk_mem_gen_v2_6/vlg77/ramb36sdp__wrap.bin' failed

at com.xilinx.sim.base.XSTHandler.implement(Unknown Source)

at com.xilinx.sim.base.BlackBoxSim.implement(Unknown Source)

at com.xilinx.xcc.rt.std.Module.addChild(Unknown Source)

at

com.xilinx.ip.fifo_generator_v4_3.fifo_generator_v4_3$xilinx.implementStructure(

Unknown Source)

at

com.xilinx.ip.fifo_generator_v4_3.fifo_generator_v4_3.architectureBody(Unknown

Source)

at com.xilinx.sim.base.HDLSim.implement(Unknown Source)

at com.xilinx.sim.base.HDLSim.buildStructure(Unknown Source)

at com.xilinx.sim.base.HDLSim.addHDLSim(Unknown Source)

at com.xilinx.sim.base.UnnamedHDLSim.doAddHDLSim(Unknown Source)

at com.xilinx.sim.netlisters.NetlisterAPI.implement(Unknown Source)

at com.xilinx.sim.netlisters.NetlisterAPI.implement(Unknown Source)

at com.xilinx.sim.netlisters.NetlisterAPI.process(Unknown Source)

at com.xilinx.sim.netlisters.NetlisterAPI.netlist(Unknown Source)

at com.xilinx.sim.netlisters.NetlisterAPI.netlist(Unknown Source)

at com.xilinx.sim.netlisters.NetlisterAPI.netlist(Unknown Source)

at com.xilinx.sim.netlisters.NetlisterAPI.main(Unknown Source)

Last:0 Text:(null)

Last:1 Text:(null)

ERROR:encore:132 - Failed to generate unit:

<trimode_mac_gmii_wrapper_fifo_generator_v4_3_1>.

End of process call...

ERROR:Xst:2647 - Failed to run core generator for <trimode_mac_gmii_wrapper_fifo_generator_v4_3_1> macro.

What is causing these errors to occur?

Solution

The FIFO core needed by the Trimode Ethernet MAC is not generated by the generatecore utility. This error will typically be caused by a project directory path length issue.

In order to work around the issue, try the following:

1. Copy the EDK project to a directory with a shorter path length such as C:/edk_project or /edk_project.

2. Open the project from the new location and cleanup all project files.

3. Run the synthesis tool by generating the netlist for the EDK design.

AR# 33280
Date Created 10/16/2009
Last Updated 12/15/2012
Status Active
Type General Article