When running Synthesis for a Spartan-6 design that contains PLL primitives in Synplify Pro 2009.06, I receive the following error. How do I fix it?
@E: CG596 :"d:/test/test_pll.v":38:5:38:16|parameter CLK_FEEDBACK cannot be found in module PLL_ADV.
This is a bug of Synplify Pro 2009.06. Synopsys is aware of the issue and is going to fix it in Version 2009.09.
To work around this problem, comment out the CLK_FEEDBACK parameter or generic map when you instantiate the PLL primitives and make sure the feedback clock connection is correct.