AR# 33404


11.3 EDK, plbv46_pcie_v4_01_a - The Virtex 6 FPGA Endpoint bridge incorrectly sets the NBE interrupt when receiving zero length writes.


The Non-Contiguous Byte Enables (NBE) bit in Bridge Interrupt Register (BIR, Offset 0x40) is incorrectly set for zero length write.


This has been fixed in the latest PLBv46_pcie core to eliminate the erroneous interrupt, and is available in EDK 11.3. 

EDK 11.3 is available at:
AR# 33404
Date 05/23/2014
Status Archive
Type General Article
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