UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 33410

Endpoint Block Plus Wrapper v1.12 for PCI Express - Compatibility issues with ISE Project Navigator because of PIO_EP.v file module declarations and 64-bit interface ifdef declaration

Description

Known Issue: v1.12

The v1.12 PIO example design files use some `defines for module declarations and does not define PIO_64 in each file. This causes problems with ISE Project Navigator. Synthesis through command line works fine.

Solution

In PIO_EP.v change:

'PIO_RX_ENGINE to PIO_64_RX_ENGINE
'PIO_TX_ENGINE to PIO_64_TX_ENGINE

Before the module declaration in PIO.v and PIO_EP.v add:

'define PIO_64

Revision History

09/16/2009 - Initial Release
AR# 33410
Date Created 09/08/2009
Last Updated 08/26/2013
Status Active
Type General Article
IP
  • Endpoint Block Plus Wrapper for PCI Express