AR# 33458: XPE Virtex-5 FPGA FXT - Why is there such a huge variation between typical and maximum process?
XPE Virtex-5 FPGA FXT - Why is there such a huge variation between typical and maximum process?
In the Virtex-5 FPGA XPE spreadsheet, why is the process variation between typical and maximum for the Virtex-5 FXT devices much larger than the Virtex-5 LXT/SXT devices?
The FXT devices have much more leakage than the LXT/SXT devices. The huge variation in leakage current in FXT vs. LXT/SXT is due to the fact that there are 1-2 PPCs and up to 4 PCIe blocks in the FXT. Those blocks are built with mostly short channel length, thin-oxide, low Vt transistors for performance, but those have high leakage. While the total number of low Vt transistors compared to all transistors is small, it need to be understood that the low Vt, thin-ox transistors have 15-20x the leakage of the regular Vt ones. Since, the LXT and SXT devices do not have those blocks (or minimal in the case of PCIe blocks), their leakage is much lower. The process variation consists of 2 basic factors: 1) Change in Vt of +/- x mV will cause a much larger change in leakage on the low Vt vs. regular Vt transistor. 2) A change in gate length of +/- y nm will cause a much larger change in leakage than on a short channel device than on a long channel one. The PPC and PCIe make for a disproportionate share of low Vt short channel transistors, so the FXT parts are affected much more by process variation. Because of the process variation the FXT parts maximum leakage vs typical is much greater. Additionally, the default process (typical) is much higher since the device has a greater amount of low Vt transistors than LXT or SXT.