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AR# 33487

Spartan-6 FPGA GTP Transceiver - Known Issues and Answer Record List

Description

This Answer Record contains the Known Issues and a list of Answer Records for the GTP Transceiver for the Spartan-6 device.

Solution

Wizard:
(Xilinx Answer 44490)Spartan-6 FPGA GTP Transceiver Wizard v1.11 - Release Notes and Known Issues for ISE Software 13.3
(Xilinx Answer 42807)Spartan-6 FPGA GTP Transceiver Wizard v1.10 - Release Notes and Known Issues for ISE Software 13.2
(Xilinx Answer 41829)Spartan-6 FPGA GTP Transceiver Wizard v1.9 - Release Notes and Known Issues for ISE Software 13.1
(Xilinx Answer 41828)Spartan-6 FPGA GTP Transceiver Wizard v1.8 - Release Notes and Known Issues for ISE Software 12.4
(Xilinx Answer 38398)Spartan-6 FPGA GTP Transceiver Wizard v1.7 - Release Notes and Known Issues for ISE Software 12.3
(Xilinx Answer 41825)Spartan-6 FPGA GTP Transceiver Wizard v1.6 - Release Notes and Known Issues for ISE Software 12.2
(Xilinx Answer 41824)Spartan-6 FPGA GTP Transceiver Wizard v1.5 - Release Notes and Known Issues for ISE Software 12.1
(Xilinx Answer 33865)Spartan-6 FPGA GTP Transceiver Wizard v1.4 - Release Notes and Known Issues for ISE Software 11.4
(Xilinx Answer 33468) Spartan 6 FPGA GTP Transceiver Wizard - v1.3 Release Notes and Known Issues
(Xilinx Answer 32747) Spartan 6 FPGA GTP Transceiver Wizard - v1.2 Release Notes and Known Issues
(Xilinx Answer 32996) Spartan-6 FPGA GTP Transceiver Wizard - Timing not met on implemented example design
(Xilinx Answer 33532) Spartan 6 FPGA GTP Transceiver Wizard - Invalid reference clocks can be selected from the GUI
(Xilinx Answer 33626) Spartan-6 FPGA GTP Transceiver Wizard - v1.3 - Example design ChipScope analyzer ILA core reports incorrect behavior
(Xilinx Answer 33627)Spartan-6 FPGA GTP Transceiver - Updated attribute settings for v1.3 of the Spartan-6 FPGA Transceiver Wizard
(Xilinx Answer 35591) Spartan-6 GTP Transceiver Wizard: tx_sync module does not use appropriate wait times
(Xilinx Answer 37659) Spartan-6 FPGA GTP Transceiver Wizard - Implementing updated line rates in ISE Design Suite 12.2 and earlier

Software:
(Xilinx Answer 33353) Spartan-6 FPGA GTP Transceiver - Reference clock forwarding considerations and limitations

Usage:
(Xilinx Answer 43154) Spartan-6 FPGA GTP Transceiver - Reference clock phase noise mask
(Xilinx Answer 32972) Spartan-6 FPGA GTP - Far-End PCS Loopback data errors
(Xilinx Answer 33504) Spartan-6 FPGA GTP Transceiver - Channel Bonding signals fail timing
(Xilinx Answer 33572) Spartan-6 FPGA GTP Transceiver - GTPCLKOUT must be routed through a BUFIO
(Xilinx Answer 33863)Spartan-6 FPGA GTP - PLL feedback divider settings in GTP
(Xilinx Answer 33575)Spartan-6 FPGA - JTAG Configuration Setup For Designs Using GTPs
(Xilinx Answer 35237) Spartan-6 FPGA GTP Transceiver - SelectIO to GTP CRosstalk/SSO Guidelines
(Xilinx Answer 38242) Spartan-6 FPGA GTP Transceiver - Latency tables based on blocks used
(Xilinx Answer 33572) Spartan-6 GTP Transceiver - GTPOUTCLK must be routed through a BUFIO
(Xilinx Answer 35776) Spartan-6 GTP Transceiver - Recommended PMA_CDR_CFG settings for improved CDR performance
(Xilinx Answer 35386) Spartan-6 FPGA - Does Spartan-6 or Virtex-6 have CRC hard blocks?

Hardware:
(Xilinx Answer 35434) Spartan-6 GTP Transceiver - Updates for production silicon

Linked Answer Records

Associated Answer Records

AR# 33487
Date Created 09/14/2009
Last Updated 05/19/2012
Status Active
Type Known Issues
Devices
  • Spartan-6 LXT