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AR# 33519

11.3 Spartan-6 FPGA Route - BUFG fails to work or works intermittently


My Spartan-6 device passes simulation and has no timing issues, but it fails in hardware. One of the BUFGs in the design works intermittently.

What causes this behavior?


There is a low frequency problem in Spartan-6 devices where a BUFG can be affected by an unrelated signal. The problem occurs when a signal is "bounced" off a switchbox pin that is connected to the unused "S" pin of the BUFGMUX site where the BUFG is placed.

To check for this condition in FPGA Editor, trace from the "S" pin of the suspect BUFGMUX site, through the green pin-wire to the white local connection wire; this wire will end at a switchbox pin. Check to see if any routing is connected to the switchbox pin as a bounced connection. A switchbox bounce is part of a two-way connection inside a switchbox between the input and output pins.

If this problem is detected, it can be avoided by forcing the signal to be routed on different resources. If this is not possible, a patch is available for ISE Design Suite 11.3. Open a WebCase and refer to this Answer Record number; (Xilinx Answer 33519).
AR# 33519
Date 12/15/2012
Status Active
Type General Article
  • Spartan-6 LX
  • Spartan-6 LXT
  • ISE Design Suite - 11.3
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