Using ISE software 11.3 and the Distributed Memory Core v4.2, if you choose to register the output and set the Pipeline Stages option to 1, this is reset back to 0 when the core is generated and the following warnings are issued in the coregen GUI:
WARNING:sim:356 - The parameter 'Pipeline_Stages' is disabled, its value will default from '1' to '0'.
WARNING:sim:192 - Xco Parameter changed from (Pipeline_Stages,1) to (Pipeline_Stages,0) during Recustomization
How can I resolve this issue?
This issue will be solved in the 11.4 release of ISE. For now a tactical patch has been created to solve this issue. Please read the readme file included in the patch download before installing.