We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 33780

11.3 ChipScope Pro Anaylzer - FPGA cannot be configured in Analyzer when a PLX Technology PCI9030 (PCI Target I/O Accelerator) is in the JTAG chain


The ChipScope tool does not recognize the FPGA when it is the first device in the JTAG chain and a PCI9030 is in the chain. The following messages appear in the ChipScope Pro Analyzer console:

"COMMAND: show_instruction_register 1

ERROR: Error in Cse_IRStatus::read()

ERROR: Communication failed with device: 1"

How do I work around this issue?


This issue is related to the other device in the JTAG chain.

To work around this problem, remove the PCI9030 device from the JTAG chain. This device requires the TRST pin be pulled Low, the ChipScope tool requires TRST to be pulled High. Also, there are issues with the PCI9030 BYPASS operation, preventing ChipScope Analyzer from functioning correctly. Both issues are described in the PCI9030 errata.

AR# 33780
Date 12/15/2012
Status Active
Type General Article
Page Bookmarked