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AR# 33847

Endpoint Block Plus Wrapper v1.13 for PCI Express - Incorrect voltage swing due to GT_TX_BUFFCTRL is left unconnected in top level core file


Known Issues: v1.13, v1.12

In the top level file which has the same name of the generated core found in the <core name>/source directory, there are the following connections on the instance for pcie_ep_top:

.gt_txbuffctrl_0 ( TXBUFFCTRL),

.gt_txbuffctrl_1 ( TXBUFFCTRL),

The problem is that TXBUFFCTRL is not being defined in this file. This causes XST to tie the TXBUFFCTRL signal to ground resulting in the MGT port TXBUFFDIFFCTRL to be tied to 000 instead of the default 100.


This issue is schedule to be fixed in ISE 12.1 in core version 1.14.

To resolve this issue in v1.13 and v1.12 of the Endpoint Block Plus core, make the follow code change in the top level file in the <core name>/source directory. This file will have the same name as the generated project.

On or about line 160 you will see:

parameter TX_DIFF_BOOST = "TRUE",
parameter TXDIFFCTRL = 3'b100,
parameter TXBUFDIFFCTRL = 3'b100,
parameter TXPREEMPHASIS = 3'b111,

Change the TXBUFDIFFCTRL to be TXBUFFCTRL as follows:

parameter TX_DIFF_BOOST = "TRUE",
parameter TXDIFFCTRL = 3'b100,
parameter TXBUFFCTRL= 3'b100,
parameter TXPREEMPHASIS = 3'b111,

Note the actual values depend on selections made during the core customization process and may differ from what is shown here.

Revision History
02/23/2010 - Added note about values
12/2/2009 - Initial Release
AR# 33847
Date 05/19/2012
Status Active
Type Known Issues
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