AR# 33880

Description

Solution

There is an error in one of the XPS Timer data files (xps_timer_v2_1_0.mpd) which declares that the core is level sensitive. 

The sensitivity of the XPS Timer Core should be edge sensitive.

Option 1: Make the xps_timer_v1_01_b local:

1. Right-click on the xps_timer core instance in your project.
2. Select "Make This IP Local".
3. Browse into your project's pcores directory.
4. Open the xps_timer_v1_01_b\data\xps_timer_v2_1_0.mpd file in a text editor.
5. Change line 91:

From:

PORT Interrupt = "", DIR = O, SIGIS = INTERRUPT, SENSITIVITY = LEVEL_HIGH, INTERRUPT_PRIORITY = HIGH

To:

PORT Interrupt = "", DIR = O, SIGIS = INTERRUPT, SENSITIVITY = EDGE_RISING, INTERRUPT_PRIORITY = HIGH

Option 2: Make the fix globally:

1. Change line 91 in the file below:
   
   

   C:\Xilinx\11.1\EDK\hw\XilinxProcessorIPLib\pcores\xps_timer_v1_01_b\data\xps_timer_v2_1_0.mpd

   from:

   PORT Interrupt = "", DIR = O, SIGIS = INTERRUPT, SENSITIVITY = LEVEL_HIGH, INTERRUPT_PRIORITY = HIGH

   to:

   PORT Interrupt = "", DIR = O, SIGIS = INTERRUPT, SENSITIVITY = EDGE_RISING, INTERRUPT_PRIORITY = HIGH



2. Open C:\Xilinx\11.1\EDK\hw\XilinxProcessorIPLib\pcores\__MpdDataBase.txt (this is a cache of all the peripheral cores installed for EDK)


3. Find the xps_timer_v1_01_b section in the file and make the same changes as performed in Step 1.

This problem is scheduled to be fixed in the 12.1 release.