We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 34102

Spartan-6 Low Power - Bitstream Generation not supported in 11.4


The 11.5 BitGen tool will error out when creating bitstreams for some Spartan-6 FPGA Low Power designs.


The BitGen tool in ISE 11.5 Design Suite will error out if a bitstream creation is attempted under the following two conditions:

- Device targeted is Spartan-6 Low Power

- Design uses the DFS portion of the DCM (CLKFX, CLKFX180, or CLKFXDV outputs)

BitGen will error out with the following message:

A DCM (s) implements the DFS (by using a CLKFX, CLKFX180, CLKFXDV pin) which is not currently supported for this device.

The Spartan-6 Low Power devices will support bitstream creation of designs containing the DFS in the ISE 12.1 Design Suite software.

AR# 34102
Date 03/23/2010
Status Archive
Type General Article
  • Spartan-6 LX
  • ISE Design Suite - 11.4
  • ISE Design Suite - 11.5
Page Bookmarked