1. A warning message is thrown when you load any SysGen design saying that SysGen 11.4 is not compatible with 11.4.1
2. Parsing of the PartGen file fails due to the version number change. This results in a empty SysGen token (i.e. no parts are shown), which means generation is not possible. This will also affect simulation of several IP cores.
3. Hardware co-sim for the ML605 board fails due to MAP erroring out with a new error message regarding the MMCM we instantiate.
To work around these issues you must open a webcase to acquire a patch from Xilinx Technical Support.