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AR# 34251

SPI-4.2 v9.3 Rev 1 core - Block RAM count in datasheet is not accurate for Virtex-6 FPGA

Description

The SPI-4.2 core version 9.3 datasheet in 11.5 release contains inaccurate Virtex-6 FPGA block RAM resource utilization. This is scheduled to be fixed in the next release.

Solution

The accurate Virtex-6 FPGA block RAM resource utilization is below:

 

1) 64 -bit core:

RX:  5  (36k BRAM)
       1  (18k BRAM)

TX:  5 (36k BRAM)
       1 (18k BRAM)

 

2) 128-bit core:

RX:  10 (36k BRAM)

        1 (18k BRAM)

TX:   5 (36k BRAM)
        1 (18k BRAM)

AR# 34251
Date Created 03/08/2010
Last Updated 05/23/2014
Status Archive
Type General Article
IP
  • SPI-4 Phase 2 Interface Solutions