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AR# 34538

Xilinx Solution Center for PCI Express - Design Assistant

Description

The Design Assistant for PCIe walks you through the recommended design flow for PCIe while debugging commonly encountered issues such as simulation and hardware problems. 

The Design Assistant not only provides useful design and troubleshoot information but also points you to the exact documentation you need to read to help you design efficiently with PCIe.


This article is part of the PCI Express Solution Centre

(Xilinx Answer 34536) Xilinx Solution Center for PCI Express

Solution



Release Notes - Xilinx PCI Express Solutions


If you are debugging issues related to specific Xilinx PCI Express core, please check the answer records in the respective core release notes listed below.

Release notes contain Known Issues, Design Advisories, Patches (if any), General Debugging Information, Core Version Information etc.

UltraScale Architecture  PHY for PCI Express

(Xilinx Answer 66988)

UltraScale+ PCI Express Integrated Block

(Xilinx Answer 65751)

DMA Subsystem for PCI Express

(Xilinx Answer 65443)

UltraScale FPGA Gen3 Integrated Block for PCI Express

(Xilinx Answer 57945)

AXI Bridge for PCI Express Gen3

(Xilinx Answer 61898)

Virtex-7 FPGA Gen3 Integrated Block for PCI Express

(Xilinx Answer 54645) For v2.0 and onwards in Vivado Design Suite.
(Xilinx Answer 47441) For all versions in ISE Design Suite and versions prior to v2.0 in Vivado Design Suite.

7 Series Integrated Block for PCI Express

(Xilinx Answer 54643) For v2.0 and onwards in Vivado Design Suite.
(Xilinx Answer 40469) For all versions in ISE Design Suite and versions prior to v2.0 in Vivado Design Suite.

AXI PCI Express

(Xilinx Answer 54646) For v2.0 and onwards in Vivado Design Suite.
(Xilinx Answer 44969) For all versions in ISE Design Suite (EDK) and versions prior to v2.0 in Vivado Design Suite.

Virtex-6 FPGA Integrated Block for PCI Express

(Xilinx Answer 65178) Master Answer Record

Spartan-6 FPGA Integrated Endpoint Block for PCI Express

(Xilinx Answer 65177) Master Answer Record

Endpoint Block Plus Wrapper for PCI Express

(Xilinx Answer 51597) Master Answer Record

IP Release Notes Guide (XTP025) (Updated for ISE Design Suite Only):

http://www.xilinx.com/support/documentation/ip_documentation/xtp025.pdf

General Xilinx PCI Express Answer Records


(Xilinx Answer 65176) This answer record provides a list of general PCI Express Answer Records that are not related to specific Xilinx PCI Express core only.

PCI Express - Xilinx User Community Forums

http://forums.xilinx.com/t5/PCI-Express/bd-p/PCIe

Xilinx PCI Express Long Form Answer Records


(Xilinx Answer 56802) Click here to view answer records that provide comprehensive debugging and packet analysis guide for different issues in a downloadable PDF to enhance its usability.

Xilinx PCI Express Example Designs, Xilinx Development Boards/Kits and Targeted Reference Designs (TRDs)


(Xilinx Answer 65174) This answer record provides links to Xilinx Development Boards/Kits and TRDs. Xilinx Development Boards links provide example design files for respective cores, ready to download bit file, and instructions on how to generate the core and implement the generated example design.

Xilinx PCI Express Documentation


(Xilinx Answer 35920) This answer record provides links to product documentation, white papers and application notes for Xilinx PCI Express solution.

Xilinx PCI Express - Demo Videos


(Xilinx Answer 56893) This answer record provides videos related to Xilinx PCI Express solutions.

Third Party PCI Express Debugging Resources


(Xilinx Answer 65175) This answer record provides links to third party resources as a reference. The contents in the links might help in debugging Xilinx PCI Express designs.

Xilinx High-Speed Serial I/O Solution Center

(Xilinx Answer 37181)

Xilinx Boards and Kits Solution Center

(Xilinx Answer 43745)

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
34536 Xilinx Solution Center for PCI Express N/A N/A
AR# 34538
Date Created 03/01/2010
Last Updated 05/23/2016
Status Active
Type Solution Center
IP
  • Endpoint Block Plus Wrapper for PCI Express
  • Spartan-6 FPGA Integrated Endpoint Block for PCI Express ( PCIe )
  • Virtex-6 FPGA Integrated Block for PCI Express ( PCIe )