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AR# 34614

11.4 EDK - ML510 BSB C_PPC440MC_ROW_CONFLICT_MASK and C_PPC440MC_BANK_CONFLICT_MASK are incorrect

Description

For the ML510 BSB theC_PPC440MC_ROW_CONFLICT_MASK and C_PPC440MC_BANK_CONFLICT_MASK are incorrect. This can cause memory tests to fail.

Solution

The values forthe ML510 DDR2 are as follows:
  • C_DDR_DWIDTH = 64
  • Address Offset = log2(64/8) = 3
  • Column Address Width = 10
  • Row Address Width = 14
  • Bank Address Width = 2
Going through the "Row Conflict and Bank Conflict Mask Settings" on page 13 of the LogiCORE IP DDR2 Memory Controller for PowerPC 440 Processors (v3.00b) Data Sheet -v1.9, April 19, 2010 (DS567):

the MI_BANKCONFLICT_MASK = 32'h01800000 and

the MI_ROWCONFLICT_MASK = 32'h007FFE00 for the ML510 board.

This problem has been fixed in the 12.2 release.

Linked Answer Records

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
38095 ML510 - Known Issues and Release Notes Master Answer Record N/A N/A
AR# 34614
Date Created 06/23/2010
Last Updated 05/19/2012
Status Active
Type Known Issues
Devices
  • Virtex-5 FXT
Tools
  • EDK - 11.4
IP
  • PowerPC 440
Boards & Kits
  • ML510