AR# 34713


Spartan-6 FPGA Block RAM - INIT_FILE Attribute on 9K Block RAM Does Not Initialize Correctly


Initialization of the 9K block RAM (RAMB8BWER primitive) using the INIT_FILE attribute does not work correctly unless set to the default value.


Issue Description:

When using the RAMB8BWER in any mode, the INIT_FILE attribute does not correctly initialize the block RAM. 

When using the INIT_FILE attribute to set values to anything but the default zero, initialization is shown for simulation of both pre-synthesis and timing simulation, but the hardware does not reflect those same values.

Affected Components:

RAMB8BWER in any mode where INIT_FILE is set to anything but the default zero values.

Software Behavior

  • ISE Design Suite 11.5 and earlier - Simulation appears to have proper memory contents, but those contents are not reflected in the actual initialized values on the device.
  • ISE Design Suite 12.1 and later - A Design Rules Check (DRC) has been added to the UNISIM and SIMPRIM models so that an error is issued any time the INIT_FILE is a non-default value. The DRC is removed when INIT_FILE initialization is properly supported.


Do not use the INIT_FILE attribute. 

You must use the INIT attributes instead and cannot perform post-synthesis update of memory contents for the RAMB8 blocks. 

More information can be found in the Spartan-6 Libraries Guide under the RAMB8BWER primitive:

NOTE: When using the INIT attributes, please be aware of the 9K block RAM initialization issue in (Xilinx Answer 34712).

Linked Answer Records

Associated Answer Records

Answer Number Answer Title Version Found Version Resolved
32651 Spartan-6 - ISE Software 11 Update Known Issues related to Spartan-6 FPGA N/A N/A
AR# 34713
Date 08/15/2017
Status Active
Type General Article
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