General Description: When compiling a design as a module (by checking the "Do Not Insert I/O" box), Express will still insert the STARTUP module and BUFG components if it sees fit to do so. This will become a problem as modules are brought together under the top level design, as too many resources will be used.
This issue has been fixed by Synopsys by patch version 2.0.3. This patch can be downloaded from the Xilinx or Synopsys FTP site (depending on the version of Express you have). Details are given in (Xilinx Solution 3566).