AR# 34977

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Virtex-6 FPGA Design Assistant - Designing for a Virtex-6 FPGA

Description

This Answer Record provides guidance on creating a design for the Virtex-6 FPGA.

NOTE: This Answer Record is part of the Xilinx Virtex-6 FPGA Solution Center (Xilinx Answer 34963).The Xilinx Virtex-6 FPGA Solution Center is available to address all questions related to Virtex-6 devices. Whether you are starting a new design with Virtex-6 FPGA or troubleshooting a problem, use the Virtex-6 FPGA Solution Center to guide you to the right information.

Solution


When designing for the Virtex-6 FPGA, review the Application Notes and Intellectual Property (IP)to determine if there are any which can be used for the application you are targeting.
Virtex-6 FPGA Application Notes:
http://www.xilinx.com/support/documentation/virtex-6.htm#131579
Virtex-6 IP:
http://www.xilinx.com/ipcenter/index.htm

For design areas not covered by IP or Application Notes, the following Answer Records provide guidance on how to move forward with a Virtex-6 FPGA design:
(Xilinx Answer 34979) - Designing clocking structures in Virtex-6 FPGAs
(Xilinx Answer 36986) - Designing configurable logic structures in Virtex-6 FPGAs
(Xilinx Answer 36987) - Designing Block RAM and FIFO structures in Virtex-6 FPGAs
(Xilinx Answer 36988) - Designing for I/O, PCIe, EMAC, DSP, and System Monitor in Virtex-6 FPGAs

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
34963 Xilinx Virtex-6 FPGA Solution Center N/A N/A

Associated Answer Records

AR# 34977
Date 12/15/2012
Status Active
Type General Article
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