This Answer Record lists the Known Issues for the Hierarchical Design flows in the ISE Design Suite 12.1 release. This includes both the Design Preservation Flow and the Partial Reconfiguration Flow.
Each Known Issue includes a link to another Answer Record that contains additional information on the issue.
(Xilinx Answer 35399) - 12.1 Virtex-6 Partial Reconfiguration - RAM contents not written correctly to Partial Bitfiles.
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