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AR# 35044

11.5/12.1 Spartan-6 Place - The clock placer is not accounting for the proper PLL_ADV to BUFFPLL_MCB connection in larger devices - Affects MIG/MPMC MCB Designs


It has been discovered that the clock placer is not accounting for the the fact that in the larger Spartan-6 devices (LX75/LX75T and above) the BUFPLL_MCB can only be driven by four of the six PLL_ADV sites. See UG382, page 83, for a table documenting these restrictions. In cases where an incorrect site is chosen by the placer, the design will still run through the tools with no errors, but the MIG/MPMC design will fail calibration in hardware. A calibration failure is denoted by no assertion of the cal_done signal.


This issue has been resolved in the ISE 12.2 software. The fix ensures the automatic placement is correct, and incorrectly constrained components will be caught. ISE 12.2 is set to release at the end of July 2010. In the meantime, the problem can be avoided by manually constraining the components to a correct site location (as listed in UG382).
AR# 35044
Date 06/15/2010
Status Active
Type General Article
  • Spartan-6 LXT
  • Spartan-6 LX
  • ISE Design Suite - 11.2
  • ISE Design Suite - 11.3
  • ISE Design Suite - 11.4
  • ISE Design Suite - 11.5
  • MIG