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  1. Xilinx - All Programmable
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  3. AR# 35058: 11.5 EDK, XPS_LL_TEMAC_v2_03_a - Potential BRAM collisions require EDK 12.1 for Spartan-6 production use

AR# 35058

11.5 EDK, XPS_LL_TEMAC_v2_03_a - Potential BRAM collisions require EDK 12.1 for Spartan-6 production use

Description

The XPS_LL_TEMAC_v2_03_a and earlier cores have the potential for internal block RAM collisions documented in the "Spartan-6 FPGA Block RAM Resources User's Guide".

Solution

This issue might not be reported in simulation and could cause the core to fail in hardware. In summary, the core should not be used for production in Spartan-6 until EDK 12.1.

For more information, see (Xilinx Answer 34533).

This issue is scheduled to be fixed to XPS_LL_TEMAC_v2_03_a in EDK 12.1. Note there will not be a version change in EDK 12.1, see the xps_ll_temac IP changelog to verify changes. A 11.5 patch will not be available before 12.1 due to ISE dependencies.

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
34533 Design Advisory for Spartan-6 FPGA Block RAM - Address Space Overlap N/A N/A
AR# 35058
Date 05/23/2014
Status Archive
Type General Article
Devices
  • Spartan-6 LX
  • Spartan-6 LXT
Tools
  • EDK - 11.2
  • EDK - 11.3
  • EDK - 11.4
  • EDK - 11.5
IP
  • XPS LL TEMAC
Boards & Kits
  • Spartan-6 FPGA Connectivity Kit
  • Spartan-6 FPGA Embedded Kit
  • Spartan-6 FPGA SP601 Evaluation Kit
  • Spartan-6 FPGA SP605 Evaluation Kit