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AR# 35158

11.x ChipScope Pro ATC2 - What is the common clock signal used for?

Description

When selecting the options to generate a ChipScope Pro ATC2 core there is an option to select a "common clock". How do I use this option?

Solution

The common clock is used to repeat a signal across all banks. Thus, a common clock signal is a direct path to a pin with no runtime dynamic switching option for the signal. 

The use model of having 1 signal repeat on all banks is common. When probing clock sources, this is a valuable reference signal used to measure other relative signal activity. So, for instance you may want to see how a counter toggles with respect to its source clock or a reference clock used to create the source clock. For these debug measurements, the clock probed is repeated for every bank, usually in the same position. Hence, the need for a common clock. This has been introduced for Spartan-6 in 11.x, and in 12.1 will be extendeding this option to all families.

Note, you can have 1 or more common clock ports.  When you have more ports you simply increase the number of direct pin connections that do not switch dynamically.

AR# 35158
Date Created 04/09/2010
Last Updated 05/23/2014
Status Archive
Type General Article
Devices
  • Spartan-6 LX
  • Spartan-6 LXT
  • Virtex-4 FX
  • More
  • Virtex-4 LX
  • Virtex-4 QPro/R
  • Virtex-5 TXT
  • Virtex-5Q
  • Virtex-4 SX
  • Virtex-5 FXT
  • Virtex-5 LX
  • Virtex-5 LXT
  • Virtex-5 SXT
  • Virtex-6 CXT
  • Virtex-6 HXT
  • Virtex-6 LX
  • Virtex-6 LXT
  • Virtex-6 SXT
  • Less
Tools
  • ChipScope Pro - 11.3
  • ChipScope Pro - 11.4
  • ChipScope Pro - 11.5