AR# 35260: MIG Virtex-6 DDR2/DDR3 - Clocking and Reset
MIG Virtex-6 DDR2/DDR3 - Clocking and Reset
This section of the MIG Design Assistant will guide you to details on the clocking and reset for the Virtex-6 DDR3/DDR2 designs. Please select from the below options to find information related to your specific question.
Note: This Answer Record is a part of the Xilinx MIG Solution Center (Xilinx Answer 34243) The Xilinx MIG Solution Center is available to address all questions related to MIG. Whether you are starting a new design with MIG or troubleshooting a problem, use the MIG Solution Center to guide you to the right information.