AR# 35300: 11.4 EDK, MicroBlaze - Processor stall occurs when TLB set to inhibit caching
AR# 35300
11.4 EDK, MicroBlaze - Processor stall occurs when TLB set to inhibit caching
Description
If MicroBlaze v7_02_d is configured with a MMU, writeback caches and c_dcache_always_used=1, and MicroBlaze can stall if the a TLB is configured as inhibit caching. How do I resolve this issue.
Solution
To work around this issue, changing any of above settings should prevent the stalls.
This issue is fixed in MicroBlaze_v7_03_a, to be released in EDK 12.1.