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AR# 35520: 11.5 PACK - What can cause an I/O register to fail to pack into an IOB, ILOGIC, or OLOGIC component?
11.5 PACK - What can cause an I/O register to fail to pack into an IOB, ILOGIC, or OLOGIC component?
The following warning message occurs:
"WARNING:Pack:680 - The register symbol xyz has the property IOB=TRUE, but failed to join an I/O component. Please try constraining the register together with a valid pad or I/O buffer symbol."
Why does the register fail to be packed into an I/O component?
What are the restrictions involved, and how can I debug this problem?
There are a number of restrictions that can cause an I/O register pack can fail:
The register must be connected to an I/O buffer to be eligible for the I/O component pack. Output FFs should drive only the output buffer since there is no resource to allow the register to drive back out into the fabric.
The register's control signals must be compatible with the control signals of other registers in the I/O component. Examine the target I/O component using the Logic Block Editor (LBE) in FPGA Editor (select comp, editblock) to get a graphical representation of the control set connectivity. Compare the control signals involved with the problem register. Sometimes fanout limits during synthesis or Global Optimization can lead to logic replication of the logic driving control signals. If the resulting logically equivalent nets are not partitioned correctly, this can break I/O register packs that would have otherwise worked.
If the I/O register is in a different hierarchy than the rest of the I/O logic, the I/O register pack can be blocked by KEEP HIERARCHY constraints. Run MAP again with the "-ignore_keep_hierarchy" option to test for this.
If the I/O register belongs to an area group that is range constrained to slice logic, this prevents the I/O component pack. This can be overridden with a more specific LOC constraint to an I/O Site.
A KEEP net constraint on the net between the I/O register and I/O buffer can prevent the I/O component pack.
As a debug technique, apply the same BLKNM constraint to I/O register and I/O buffer. This hard constraint results in a more detailed message with information about why the I/O component pack is not possible.