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AR# 35615

12.1 Schematic - The RTL viewer draws some of my symbols with incorrect pins


A user has particular modulesina design thatthe RTL viewer is drawing a different module for (i.e. the pins in the RTL symbol do not match the ports from the module in the design.


The problem described above will occur if a module or entity is given the same name as a Xilinx primitive or matches a name in the following list. In either case, the Xilinx symbol will be used in the RTL drawing rather that the correct symbol based on the user's design.

RTL viewer Macro names:

Accumulator, adder, adderconstant, addsub, addsubconstant, alias, Combmultiplier, combmultiplierconstant, counter, decoder, equal, Equalconstant, gnd, greater, greaterconstant, greaterorequal, Greaterorequalconstant, iobuf, less, lessconstant, lessorequal, Lessorequalconstant, lut1, lut1_d, lut1_l, lut2, lut2_d, lut2_l, lut3, lut3_d, lut3_l, lut4, lut4_d, lut4_l, lut5, lut5_d, lut5_l, lut6, lut6_2, lut6_2_d, lut6_2_l, lut6_2_mux, lut6_d, lut6_l, multiplier, multiplierconstant, mux, muxcy, muxcy_d, muxcy_l, notequal, notequalconstant, prioencoder, ram, rom, shift_left, shift_right, shifter, shiftreg, subtractor, subtractorconstant, vcc, xor

Changing the module name to a name not listed (e.g. from counter to counter_1)will resolvethis issue for a given design.

This Answer Record will be updated when a permanent fix is added to the RTL Viewer software.

AR# 35615
Date 12/15/2012
Status Active
Type General Article
  • ISE Design Suite - 12.1
  • ISE Design Suite - 11.1