I generate the Virtex-6 FPGA Integrated Block for PCI Express (PCIe) core using the CORE Generator plug-in within the ISE software. Generation of the core completes successfully. However, when I attempt to synthesize my entire design, I encounter the following error:
ERROR:ProjectMgmt:387 - TOE: ITclInterp::ExecuteCmd gave Tcl result 'can't read "instance": no such variable'."
I am no longer able to generate my design due to this error.
How can I resolve this issue?
This issue has been fixed in the ISE Design Suite 12.1 release. Please download and install the latest release from the Downloads page:
To work around this issue in ISE Design Suite 11.5, generate the core using the CORE Generator standalone. You can then use the core as a blackbox in your design.