AR# 35781


How to do simulation on DCM/PLL/MMCM with external feedback?


If the DCM/PLL/MMCM is configured as external feedback, how do you simulate it?


To simulate external feedback you can add the external board delay in the testbench.

For VHDL: the keyword "transport" should be used in testbench. FBIN <= transport FBOUT after 1ns;

For Verilog: assign FBIN = #1ns FBOUT;

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Answer Number Answer Title Version Found Version Resolved
46790 Spartan-6 FPGA Design Assistant - Troubleshooting Common Clocking Problems N/A N/A
AR# 35781
Date 03/07/2013
Status Active
Type General Article
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