AR# 35917


PlanAhead - Importing placement into a Virtex-6 FPGA design indicates that BUFGDLL is not a supported primitive


When I import placement in PlanAhead for a Virtex-6 FPGA design, I receive a message that BUFGDLL is an unrecognized primitive.

Why does this happen? How do I work around it?


BUFGDLL is not a supported primitive for Virtex-6 FPGA designs.

This netlist in this case must have been retargeted from a previous architecture.

To eliminate this error, edit your code and netlist to include only supported primitives.

AR# 35917
Date 08/11/2014
Status Archive
Type General Article
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