AR# 35937


13.1 ISE - "ERROR:NgdBuild:467 - output pad net 'ddr2_dm_c[0]' has an illegal buffer..."


When a design contains MIG, MPMC, System ACE or another IP which instantiates I/O Buffers inside it as a blackbox, the following errors occur during the translate process:

ERROR:NgdBuild:947 - bidirect pad net 'ddr2_dq_c[0]' is driving non-input buffer(s)
ERROR:NgdBuild:467 - output pad net 'ddr2_dm_c[0]' has an illegal buffer...


I/O buffers already exist in the HDL source code of the IP core.

The issue is caused by synthesis tool adding extra I/O buffer to it.

To work around it, perform the following:

  1. When using XST, refer to (Xilinx Answer 32847).
  2. When using Synplify, refer to (Xilinx Answer 4508) to add black_box_pad_pin constraint to set pins on black-box component as I/O pads, or to add syn_insert_pad =0 on specified pins to tell the tool not to add extra buffers.

Following is the example on adding syn_insert_pad:

.sdc File Syntax
define_attribute {GIN(2:0),} syn_insert_pad {0}
define_attribute {Q} syn_insert_pad {0}

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AR# 35937
Date 12/15/2012
Status Active
Type General Article
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