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AR# 36102

Serial RapidIO v5.4 - "ERROR:sim:479 - Batch command generate is illegal without an open project"


When a Serial RapidIO v5.4 Core is run through implementation in ISE software 12.1 or later using the provided script, the following errorsare encountered:
"ERROR:sim:479 - Batch command 'generate' is illegal without an open project."
"ERROR:sim:554 - Error found during execution of IP phy_ila (ILA (ChipScope Pro -Integrated Logic Analyzer) version 1.03.a)"


This is due to a new requirement in ISE software 12.1 that a CORE Generator project (.cgp) is needed in order to generate cores in batch mode. The Serial RapidIO implementation script calls CORE Generator to generate the ChipScopeanalyzer cores needed for use with the example design. To work around this issue, you can do one of the following:

  • Generate and move to the v5.5 Core.
  • Remove the CORE Generator calls from the implementation script and generate those cores manually in CORE Generator using the provided .xco files.
  • Create a "dummy" CORE Generator project and modify the script to point to it as is done in the v5.5 Core with commands similar to the following: "coregen -p coregen.cgp -b phy_ila.xco"
AR# 36102
Date 12/15/2012
Status Active
Type General Article
  • ISE Design Suite - 12.1
  • Serial RapidIO
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