When using the LVDS_25 or LVDS_33 on a bidirectional signal the following error occurs:
"ERROR:PhysDesignRules:760 - Incompatible programming for IO standard. IOstandard LVDS_25 of comp XX does not allow both input and outputprogramming on the same comp.
ERROR:Pack:1642 - Errors in physical DRC."
This error message is correct, the LVDS is a differential I/O standard for unidirectional signals, not forbidirectional signals. For bidirectional signals, use the IOSTANARD BLVDS.
Note: The BLVDS requires external termination, see the BLVDS Output Termination section of the Spartan-3 Generation FPGA User Guide (UG331).