The Spartan-6 LX and LXT devices with -3N speed gradedo not have the Memory Controller Block (MCB) support. The -3N speed files are independent and different than the -3 speed files, so all timing analysis must be done completely for the targeted device. See the Switching Characteristics section of the Spartan-6 FPGA Data Sheet(DS162) for the speed file numbers.
In the ISE12.3 software, there isa -3N speed grade available to pick for the target device.
Software versions prior to the ISE 12.3 softwaredo not have a -3N speed grade available to use.Instead, target the -3 speed grade and do not use the Memory Controller Block.The generated bitstream created will still work correctly in the -3N speed grade devices.However, beginning in ISE tools 12.4, the -3 and -3N speed grades are no longer identical, so the -3N devices must beselected in the software if they are being targeted by the design.