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AR# 36689

LogiCORE IP Ten Gigabit Ethernet PCS/PMA (10GBASE-R) v1.2 - Data mis-matches in timing simulation in ISE Design Suite 12.2

Description

In timing simulation the following errors can be seen:

 * Warning: CONV_INTEGER(UNSIGNED) input array has 32 bits and MSB is not zero.
 #    Time: 56393100 ps  Iteration: 0  Instance: /demo_tb
 # ** Error: Tx data check ERROR!!, frame 0, word 26, StimData = 117901063MonData = -300814831
 #    Time: 56393100 ps  Iteration: 0  Instance: /demo_tb
 # ** Error: Tx data check ERROR!!, frame 0, word 27, StimData = 117901063MonData = 300814830
 #    Time: 56393100 ps  Iteration: 0  Instance: /demo_tb
 # ** Warning: CONV_INTEGER(UNSIGNED) input array has 32 bits and MSB is not zero.
 #    Time: 56399568 ps  Iteration: 0  Instance: /demo_tb
 # ** Error: Tx data check ERROR!!, frame 0, word 28, StimData = 117901063MonData = -300814831
 #    Time: 56399568 ps  Iteration: 0  Instance: /demo_tb
 # ** Error: Tx data check ERROR!!, frame 0, word 29, StimData = 117901063MonData = 300814830
 #    Time: 56399568 ps  Iteration: 0  Instance: /demo_tb
 # ** Error: Tx data check ERROR!!, frame 0, word 30, StimData = 117901063MonData = 1878912529
 #    Time: 56406036 ps  Iteration: 0  Instance: /demo_tb
 # ** Error: Tx data check ERROR!!, frame 0, word 31, StimData = 117901063MonData = 300814831
 #    Time: 56406036 ps  Iteration: 0  Instance: /demo_tb


Solution

These failures in 12.2 are due to changes in timing to and from the GTH. Two changes are required to the demo TB to resolve these errors:

  1. change the delay between refclk_p rising and new xgmii_txdata being applied to 3.2ns (was 1.6ns), OR (better) sync the TX data to something else, in the tx stimulus procedure such as syncing to core_clk156_out = '0'. That should now be the same clock as used internally in the GTH.
  2. RX was also affected and this was due to the 'wait for 1000000ps' for the rxcodeerr_stable to fall not being quite long enough. Increasing this delay by 1ms works, or the testbench can be changed to wait for rxcodeerr_stable = 0 and then wait another 400ns to make sure everything works fine.

Linked Answer Records

Master Answer Records

AR# 36689
Date Created 07/09/2010
Last Updated 05/26/2014
Status Archive
Type Known Issues
Tools
  • ISE Design Suite - 12.2
IP
  • 10 Gigabit Ethernet Media Access Controller