What are the signal and toggle rates in XPA?
Why does the signal rate not match the clock frequency?
The signal rate defines the number of millions of transitions per second (2xMHz) for the element considered. In a traditional design with rising or falling edged synchronous elements, the maximum valueis half the input clock frequency. If the clock is at 100 MHz, (200 Million Transitions per Second (Mtps)) and the data only changes once per clock cycle, then the signal rate is 100 Mtps. If a synchronous element can change with each clock edge, then the maximum valueis the same as the input clock frequency. If the clock is at 100 MHz, (200 Million Transitions per Second (Mtps)) and the data changes once before the rising clock edge and once before the falling clock edge of every clock cycle, then the signal rate is 200 Mtps.
The toggle rate is the rate at which a net or logic element switches compared to its input(s). Toggle rate is expressed as a percentage. The toggle rate reflects how often an output changes relative to a given input or clock input. In a traditional design with rising or falling edged synchronous elements, the maximum value could be 100%. A toggle rate of 100% states that on average, the output toggles once during every clock cycle, making the effective output signal frequency half the clock frequency. If a synchronous element is using both clock edges, then the maximum value could be 200%. A toggle rate of 200% states that the output toggles twice during every clock cycle, changing on both rising and falling clock edges, and making the effective output signal frequency equal to the clock frequency. In the majority of cases, the value ranges from 12.5% to 25%, since the inputs on the synchronous elements do not toggle on every clock edge.