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AR# 36939

Project Navigator - Adding files to VHDL libraries through Tcl


Using the Xilinx Tcl script interface, how can I create VHDL libraries and add sources to, or move source files between VHDL libraries?


Creating a VHDL library through Tcl:

The "lib_vhdl new" command creates a new library in the current ISE project.


lib_vhdl new <library_name>

  • <library_name> specifies the name of the library you wish to create.

For Example:

lib_vhdl new mylib

To add a source file to a VHDL library using Tcl, you can specify the library when adding the file to the project, or add the file and then move it to the desired library. 

Specifying a VHDL library when adding a source to a project:


xfile add <file-name> [-copy] [-lib_vhdl <library-name>]

  • <file_name> specifies the name of the source file(s) you wish to add to the current ISE project.
  • -copy is the optional argument for copying files to the current ISE project.
  • -lib_vhdl specifies the option to add the file(s) to an existing VHDL library

Moving a source file to a VHDL library:

The "lib_vhdl add_file" is used to move a project source file to a VHDL library in the current project.


lib_vhdl add_file <library_name> <file_name>

  • lib_vhdl is the name of the Xilinx Tcl command.
  • add_file is the name of the lib_vhdl sub-command.
  • <library_name> specifies the name of the VHDL library.
  • <file_name> specifies the name of the project source file.

For Example:

lib_vhdl add_file mylib top.vhd

Note: If two source files have the same name (but different directory locations) the absolute path to the source file being specified must be used.

If only the file name is specified, the first file name to matched is moved to the given library, which might be incorrect if there are multiple files of the same name.

AR# 36939
Date 10/14/2015
Status Active
Type General Article
  • ISE
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