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AR# 36961

LogiCORE IP Ethernet 1000BASE-X PCS/PMA or SGMII v10.5 - Timing failure on Spartan-6 TBI interface

Description

This issue is a timing failure (setup/hold) on the TBI interface for all Spartan-6 FPGA permutations in ISE 12.2 software.

Solution

This issue has been fixed in v10.5 rev1 of the 1000BASE-X PCS/PMA or SGMII core.

Rev1 of the core can be installed by downloading the patch available in (Xilinx Answer 36674)

To fix this issue, you will need to edit the UCF file.

 Identify the OFFSET constraints which are applied to the TBI Rx bus:

 #-----------------------------------------------------------
 # To check (analyze) TBI Rx Input Setup/Hold Timing        -
 #-----------------------------------------------------------
  NET "rx_code_group<?>" OFFSET = IN 2.5 ns VALID 3 ns BEFORE "pma_rx_clk0" RISING;


 Fully replace this syntax with the following:
 

 #-----------------------------------------------------------
 # To check (analyze) TBI Rx Input Setup/Hold Timing        -
 #-----------------------------------------------------------

 NET "rx_code_group<?>"                   TNM
 = "rx_code_grp";                                                                                                                                                                
 NET "core_wrapper/pma_rx_clk0_bufio"     TNM = "Rising_BUFIO_grp";  
 NET "core_wrapper/not_pma_rx_clk0_bufio" TNM = "Falling_BUFIO_grp";
 TIMEGRP "rx_code_grp" OFFSET = IN  2.5 ns VALID 3 ns BEFORE "pma_rx_clk0" TIMEGRP "Rising_BUFIO_grp";
              TIMEGRP "rx_code_grp" OFFSET = IN -5.5 ns VALID 3 ns BEFORE "pma_rx_clk0" TIMEGRP "Falling_BUFIO_grp";


Linked Answer Records

Master Answer Records

AR# 36961
Date Created 07/23/2010
Last Updated 09/08/2014
Status Active
Type General Article
Devices
  • Spartan-6 LX
  • Spartan-6 LXT
Tools
  • ISE Design Suite - 12.2
IP
  • Ethernet 1000BASE-X PCS/PMA or SGMII