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AR# 3738

M1.4 Ngd2vhdl - 2-dimensional array used in .vhd file but type not declared

Description

Keywords: ngd2vhdl, VHDL, array

Urgency: Standard

General Description:

In time_sim.vhd
I see the problem on a few nets here is one of them:

line 18100 :
signal NEXTSTATE : STD_LOGIC_VECTOR ( 15 downto 0 );

line 23846 :
port map (I => NEXTSTATE(15, 1) , .....


Solution

This problem is fixed in the latest M1.4 Core Tools Patch
available on the Xilinx Download Area:

http://www.xilinx.com/txpatches/pub/swhelp/M1.4_alliance/cpld_sol9_m14.tar.Z
http://www.xilinx.com/txpatches/pub/swhelp/M1.4_alliance/cpld_sun9_m14.tar.Z
http://www.xilinx.com/txpatches/pub/swhelp/M1.4_alliance/cpld_hp9_m14.tar.Z
http://www.xilinx.com/txpatches/pub/swhelp/M1.4_alliance/cpld_nt9_m14.zip
AR# 3738
Date Created 04/05/1998
Last Updated 04/03/2000
Status Archive
Type General Article